Product Summary

The K4J10324QD is a 4M x 32Bit x 8 Banks Graphic Double Data Rate 3 Synchronous DRAM with Uni-directional Data Strobe.The K4J10324QD is fabricated with SAMSUNG’s high performance CMOS technology.

Parametrics

K4J10324QD absolute maximum ratings: (1)Voltage on any pin relative to Vss:-0.5V to VDDQ+0.5V; (2)Voltage on VDD supply relative to Vss:-0.5V to 2.5V; (3)Voltage on VDDQ supply relative to Vss:-0.5V to 2.5V; (4)MAX Junction Temperature:+125℃; (5)Storage temperature:-55℃ to +150℃; (6)Short Circuit Output Current:50mA.

Features

K4J10324QD features: (1)1.7V(min) to 1.9V(max) power supply for device operation ; (2)1.7V(min) to 1.9V(max) power supply for I/O interface ; (3)On-Die Termination (ODT); (4)Output Driver Strength adjustment by EMRS; (5)Calibrated output drive; (6)1.8V Pseudo Open drain compatible inputs/outputs; (7)Merged mode or non merged mode set by EMRS2.; (8)1CS mode or 2CS mode set by EMRS1; (9)Fully independent 8banks are selected by CS0 and CS1 ; (10)Differential clock inputs (CK and CK); (11)Commands entered on each positive CK edge; (12)CAS latency : 7, 8, 9, 10, 11, 12, 13 (clock); (13)Programmable Burst length : 4 and 8; (14)Programmable Write latency : 1, 2, 3, 5, 6 and 7 (clock); (15)Single ended READ strobe (RDQS) per byte; (16)Single ended WRITE strobe (WDQS) per byte; (17)RDQS edge-aligned with data for READs; (18)WDQS center-aligned with data for WRITEs; (19)Data Mask(DM) for masking WRITE data; (20)Auto & Self refresh modes; (21)Auto Precharge option; (22)32ms, auto refresh (8K cycle) ; (23)Halogen-free & Lead-free 136 Ball FBGA; (24)Maximum clock frequency up to 1GHz; (25)Maximum data rate up to 2.0Gbps/pin; (26)DLL for outputs; (27)Boundary scan function with SEN pin.; (28)Mirror function with MF pin.

Diagrams